Nanofabrication workflows and process iteration for measurement-ready silicon quantum-dot devices.
This project summarizes nanofabrication workflows and process iteration for multilayer silicon quantum-dot devices, starting from Si/SiGe quantum-well wafers and proceeding through mesa definition, ohmic contact formation, dielectric deposition, and nanoscale gate patterning.
I led quantum-dot nanofabrication workflows and process iteration for measurement-ready devices. The fabrication flow uses a hybrid lithography strategy: maskless photolithography for large features and electron-beam lithography for nanometer-scale gates. A major challenge is reliable overlay between gate layers, since small alignment errors can create spurious quantum dots or unwanted tunnel barriers.
The project collects practical experience across E-beam lithography, ALD, RIE, metal evaporation, lift-off and etch integration, SEM/AFM metrology, and feedback between fabrication outcomes and cryogenic testing.
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